Integrated circuit (IC) structures and design have experienced continuous and rapid improvement with the increase in manufacturing capabilities and reduction in chip size. Improvements in integration density may be attributed to repeated reduction in minimum feature size which allows for more components to be integrated into a given chip area. Improvements in planar processing and integrated circuits formed by planar processing are challenged by physical limitations posed by density complexity of reduction in size.
Large scale integrated circuit (IC) chips include many circuit elements. IC design often requires considerable effort for placement of cells. Place and route programs are often used to create IC chip layouts. Some placement tools cannot handle cell placement well. IC chips require routing overheads to connect different portions of the IC chip.